Maintaining Digital Clocks In StepAnish ARORA
نویسنده
چکیده
A system of simultaneously triggered clocks is designed to be stabilizing: if the clock values ever diier, the system is guaranteed to converge to a state where all clock values are identical, and are subsequently maintained to be identical. For an N-clock system, the design uses N registers of 2 log N bits each and guarantees convergence to identical values within N 2 \triggers".
منابع مشابه
Maintaining Digital Clocks In StepAnish
A system of simultaneously triggered clocks is designed to be stabilizing: if the clock values ever diier, the system is guaranteed to converge to a state where all clock values are identical, and are subsequently maintained to be identical. For an N-clock system, the design uses N registers of 2 log N bits each and guarantees convergence to identical values within N 2 \triggers".
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تاریخ انتشار 1992